1. Multiplexed Twin Channel Device - One controller
servicing two busses.
2. Multi-function Twin Channel Device - Two controllers on one chip.
3. Command Channel Secondary DMA Engine - Allows scatter gather list and
SCB prefetch.
4. 64 Byte SCB Support - Allows disconnected, unttagged request table
for all possible target/lun combinations.
5. Block Move Instruction Support - Doubles the speed of certain
sequencer operations.
6. `Bayonet' style Scatter Gather Engine - Improves S/G prefetch
performance.
7. Queuing Registers - Allows queuing of new transactions without
pausing the sequencer.
8. Multiple Target IDs - Allows the controller to respond to selection
as a target on multiple SCSI IDs.
DESCRIPTION
This driver provides access to the SCSI bus(es) connected
to Adaptec SCSI Host Bus Adapters in the AIC7XXX Family. Supported
chips include:
AIC7770,
AIC7850, AIC7855, AIC7859, AIC7860, AIC7870, AIC7880, AIC7890,
AIC7891, AIC7892, AIC7895, AIC7896, AIC7897 and AIC7899 host adapter
chips.
These chips
are found on many motherboards as well as the following Adaptec SCSI
controller cards:
274X(W),
274X(T), 284X, 2910, 2915, 2920, 2930C, 2930U2, 2940, 2940U, 2940AU,
2940UW, 2940UW Dual, 2940UW Pro, 2940U2W, 2940U2B, 2950U2W, 2950U2B,
19160B, 29160B, 29160N, 3940,3940U, 3940AU, 3940UW, 3940AUW, 3940U2W,
3950U2, 3960, 39160, 3985, and 4944UW.
Driver
features include support for twin and wide busses, fast, ultra,
ultra2, or ultra 160 synchronous transfers depending on controller
type, tagged queuing and SCB paging.
Memory mapped
I/O can be enabled for PCI devices with the ``AHC_ALLOW_MEMIO''
configuration option. Memory mapped I/O is more efficient than the
alternative, programmed I/O. Most PCI BIOSes will map devices so that
either technique for communicating with the card is available. In some
cases, usually when the PCI device is sitting behind a PCI->PCI
bridge, the BIOS may fail to properly initialize the chip for memory
mapped I/O. The typical symptom of this problem is a system hang if
memory mapped I/O is attempted. Most modern motherboards perform the
initialization correctly and work fine with this option enabled.
Individual controllers may be configured to operate in the target role
through the ``AHC_TMODE_ENABLE'' configuration option. The value
assigned to this option should be a bitmap of all units where target
mode is desired. For example, a value of 0x25, would enable target
mode on units 0, 2, and 5.
Per target configuration performed in the SCSI-Select menu, accessible
at boot in non-EISA models, or through an EISA configuration utility
for EISA models, is honored by this driver. This includes
synchronous/asynchronous transfers, maximum synchronous negotiation
rate, wide transfers, disconnection, the host adapter's SCSI ID, and,
in the case of EISA Twin Channel controllers, the primary channel
selection. For systems that store non-volatile settings in a system
specific manner rather than a serial eeprom directly connected to the
aic7xxx controller, the BIOS must be enabled for the driver to access
this information. This restriction applies to many motherboard
configurations.
Performance and feature sets vary throughout the aic7xxx product line.
The following
table provides a comparison of the different chips supported by the
ahc driver. Note that wide and twin channel features, although always
supported by a particular chip, may be disabled in a particular
motherboard or card design.
SCSI CONTROL BLOCKS (SCBs)
Every transaction sent to a device on the SCSI bus is assigned a `SCSI
Control Block' (SCB). The SCB contains all of the information required
by the controller to process a transaction. The chip feature table
lists the number of SCBs that can be stored in on-chip memory. All
chips with model numbers greater than or equal to 7870 allow for the
on chip SCB space to be augmented with external SRAM up to a maximum
of 255 SCBs.
Very few
Adaptec controller configurations have external SRAM. If external SRAM
is not available, SCBs are a limited resource. Using the SCBs in a
straight forward manner would only allow the dirver to handle as many
concurrent transactions as there are physical SCBs. To fully utilize
the SCSI bus and the devices on it, requires much more concurrency.
The solution to this problem is SCB Paging, a concept similar to
memory paging. SCB paging takes advantage of the fact that devices usually
disconnect from the SCSI bus for long periods of time without talking
to the controller. The SCBs for disconnected transactions are only of
use to the controller when the transfer is resumed.
When the
hostqueues another transaction for the controller to execute, the
controller firmware will use a free SCB if one is available.
Otherwise, the state of the most recently disconnected (and therefore
most likely to stay disconnected) SCB is saved, via dma, to host
memory, and the local SCB reused to start the new transaction. This
allows the controller to queue up to 255 transactions regardless of
the amount of SCB space. Since the local SCB space serves as a cache
for disconnected transactions, the more SCB space available, the less
host bus traffic consumed saving and restoring SCB data.
BUGS
Some Quantum drives (at least the Empire 2100 and 1080s) will not run
on an AIC7870 Rev B in synchronous mode at 10MHz. Controllers with
this problem have a 42 MHz clock crystal on them and run slightly
above 10MHz.This confuses the drive and hangs the bus. Setting a
maximum synchronous negotiation rate of 8MHz in the SCSI-Select
utility will allow normal operation.
Although the Ultra2 and Ultra160 products have sufficient instruction
ram space to support both the initiator and target roles concurrently,
this configuration is disabled in favor of allowing the target role to
respond on multiple target ids. A method for configuring dual role
mode should be provided.
SEE ALSO
aha(4), ahb(4), cd(4), da(4), sa(4), scsi(4)
AUTHORS
The ahc driver, the AIC7xxx sequencer-code assembler, and the firmware
running on the aic7xxx chips was written by Justin T. Gibbs.
HISTORY
The ahc driver appeared in FreeBSD 2.0.
